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maxim integrated products 1 MAX5723/max5724/max5725?8? ?8/10/12 ?/??(dac)? 3ppm/ c ?( ? ?2.048v2.500v4.096v) MAX5723/max5724/max5725?2.7v5.5v? ??(6mw)???? ??????? ?100k ? (?)? MAX5723/max5724/max572550mhz4 ? spi/ qspi ? /microwire ? /dsp?????? 50mhz??dac?? 250 a???? 0.5mv?(?)?? ??MAX5723/max5724/max5725m/ z ?? ??dac????? ???????????? ??MAX5723/max5724/max5725 load?dac?( ldac )? MAX5723/max5724/max5725 ? ???i/o????? ? ?( clr )?codedac? ???dac?????MAX5723/ max5724/max572520tssop??? 20wlp? - 40 c + 125 c?? ? ???? ? ?? ???? ?? ?? ? s ??dac ? 12? ? 1lsb inl? ? ? ? ?dac?? s ????? ? 2.048v2.50 0v4.096v s ? ? ??? ? 4.5 s? ? ?2k s 6.5mm 4.4mm 20tssop?? 2.5mm 2.3mm 20wlp? s 2.7v5.5v?? s 1.8v5.5v v ddio ? s ?50mhz4?spi/qspi/microwire/dsp ?? s ???? s ???ydac???? s ldacclr ?dac s ??? ? 1k ?100k ? 19-6243; rev 0; 3/12 ?? ?? qspi is a trademark of motorola, inc. microwire is a registered trademark of national semiconductor corporation. din sclk csb out0 buffer por watchdog timer v dd gnd dac control logic power-down ref out1 out2 out3 out4 out5 out6 out7 v ddio dout clr ldac irq m/z spi serial interface 1ki 100ki code load clear/ reset (gate/ clear / reset) code register dac latch 8- /1 0- /12-bit dac 1 of 8 dac channels internal reference/ external buffer MAX5723 max5724 max5725 ???????china.maxim-ic.com/MAX5723.related MAX5723/max5724/max5725 ??8/10/12dac ??spi? ??????????????? ?????maxim?10800 852 1249 ()10800 152 1249 () maxim?china.maxim-ic.com
maxim integrated products 2 v dd , v ddio to gnd ................................................ -0.3v to +6v out_, ref to gnd ....0.3v to the lower of (v dd + 0.3v) and +6v sclk, csb, irq, m/z, ldac, clr to gnd ........... -0.3v to +6v din, dout to gnd ..................................... -0.3v to the lower of (v ddio + 0.3v) and +6v continuous power dissipation (t a = +70nc) tssop (derate at 13.6mw/nc above 70nc) .............. 1084mw wlp (derate at 21.3mw/ nc above 70nc) .................. 1700mw maximum continuous current into any pin .................... q 50ma operating temperature .................................... -40 nc to +125nc storage temperature ....................................... -65 nc to +150nc lead temperature (tssop only)(soldering, 10s) ........... +300 nc soldering temperature (reflow) .................................... +260 nc tssop junction-to-ambient thermal resistance ( ja ) ...... 73.8 nc/w junction-to-case thermal resistance ( jc ) .............. 20 nc/w wlp junction-to-ambient thermal resistance ( ja ) (note 2) ................................................................... 47 nc/w absolute m a xi m u m r a tings n ote 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations, refer to china.maxim-ic.com/thermal-tutorial . n ote 2: visit china.maxim-ic.com/app-notes/index.mvp/id/1891 for information about the thermal performance of wlp packag- ing. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera- tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. p a ck a ge t he rma l c h ara cte r istics ( n ote 1) e lect r ic a l c h ara cte r istics (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) param ete r s ym bol con d itions m in t yp ma x units d c p e rf o rma nce ( n ote 4) resolution and monotonicity n MAX5723 8 bits max5724 10 max5725 12 integral nonlinearity (note 5) inl MAX5723 -0.25 q0.05 +0.25 lsb max5724 -0.5 q0.2 +0.5 max5725 -1 q0.5 +1 differential nonlinearity (note 5) dnl MAX5723 -0.25 q0.05 +0.25 lsb max5724 -0.5 q0.1 +0.5 max5725 -1 q0.2 +1 offset error (note 6) oe -5 q0.5 +5 mv offset error drift q10 fv/nc gain error (note 6) ge -1.0 q0.1 +1.0 %fs gain temperature coefficient with respect to v ref q3.0 ppm of fs/nc ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 3 elect r ic a l ch ara cte r istics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) param ete r s ym bol con d itions m in t yp ma x units zero-scale error 0 +10 mv full-scale error with respect to v ref -0.5 +0.5 %fs da c out p ut ch ara cte r istics output voltage range (note 7) no load 0 v dd v 2ki load to gnd 0 v dd - 0.2 2ki load to v dd 0.2 v dd load regulation v out = v fs /2 v dd = 3v q10%, |i out | p 5ma 300 fv/ma v dd = 5v q10%, |i out | p 10ma 300 dc output impedance v out = v fs /2 v dd = 3v q10%, |i out | p 5ma 0.3 i v dd = 5v q10%, |i out | p 10ma 0.3 maximum capacitive load handling c l 500 pf resistive load handling r l 2 ki short-circuit output current v dd = 5.5v sourcing (output shorted to gnd) 30 ma sinking (output shorted to v dd ) 50 dc power-supply rejection v dd = 3v q10% or 5v q10% 100 fv/v dy n am ic p e rf o rma nce voltage-output slew rate sr positive and negative 1.0 v/f s voltage-output settling time ? scale to ? scale, to p 1 lsb, MAX5723 2.2 fs ? scale to ? scale, to p 1 lsb, max5724 2.6 ? scale to ? scale, to p 1 lsb, max5725 4.5 dac glitch impulse major code transition (code x7ff to x800) 2 nv*s channel-to-channel feedthrough (note 8) internal reference 3.3 nv*s external reference 4.07 digital feedthrough midscale code, all digital inputs from 0v to v ddio 0.2 nv*s power-up time startup calibration time (note 9) 200 fs from power-down 50 fs ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 4 elect r ic a l ch ara cte r istics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) param ete r s ym bol con d itions m in t yp ma x units output voltage-noise density (dac output at midscale) external reference f = 1khz 90 nv/hz f = 10khz 82 2.048v internal reference f = 1khz 112 f = 10khz 102 2.5v internal reference f = 1khz 125 f = 10khz 110 4.096v internal reference f = 1khz 160 f = 10khz 145 integrated output noise (dac output at midscale) external reference f = 0.1hz to 10hz 12 fv p-p f = 0.1hz to 10khz 76 f = 0.1hz to 300khz 385 2.048v internal reference f = 0.1hz to 10hz 14 f = 0.1hz to 10khz 91 f = 0.1hz to 300khz 450 2.5v internal reference f = 0.1hz to 10hz 15 f = 0.1hz to 10khz 99 f = 0.1hz to 300khz 470 4.096v internal reference f = 0.1hz to 10hz 16 f = 0.1hz to 10khz 124 f = 0.1hz to 300khz 490 output voltage-noise density (dac output at full scale) external reference f = 1khz 114 nv/hz f = 10khz 99 2.048v internal reference f = 1khz 175 f = 10khz 153 2.5v internal reference f = 1khz 200 f = 10khz 174 4.096v internal reference f = 1khz 295 f = 10khz 255 integrated output noise (dac output at full scale) external reference f = 0.1hz to 10hz 13 fv p-p f = 0.1hz to 10khz 94 f = 0.1hz to 300khz 540 2.048v internal reference f = 0.1hz to 10hz 19 f = 0.1hz to 10khz 143 f = 0.1hz to 300khz 685 2.5v internal reference f = 0.1hz to 10hz 21 f = 0.1hz to 10khz 159 f = 0.1hz to 300khz 705 4.096v internal reference f = 0.1hz to 10hz 26 f = 0.1hz to 10khz 213 f = 0.1hz to 300khz 750 ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 5 elect r ic a l ch ara cte r istics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) param ete r s ym bol con d itions m in t yp ma x units r e f e r ence in p ut reference input range v ref 1.24 v dd v reference input current i ref v ref = v dd = 5.5v 55 74 fa reference input impedance r ref 75 100 ki r e f e r ence out p ut reference output voltage v ref v ref = 2.048v, t a = +25nc 2.043 2.048 2.053 v v ref = 2.5v, t a = +25nc 2.494 2.5 2.506 v ref = 4.096v, t a = +25nc 4.086 4.096 4.106 reference temperature coefficient (note 10) max5725a q3 q10 ppm/nc MAX5723/max5724/max5725b q10 q25 reference drive capacity external load 25 ki reference capacitive load handling 200 pf reference load regulation i source = 0 to 500fa 2 mv/ma reference line regulation 0.05 mv/v p o w e r r e q ui r e m ents supply voltage v dd v ref = 4.096v 4.5 5.5 v all other options 2.7 5.5 i/o supply voltage v ddio 1.8 5.5 v supply current (note 11) i dd internal reference v ref = 2.048v 1.6 2 ma v ref = 2.5v 1.7 2.1 v ref = 4.096v 2.0 2.5 external reference v ref = 3v 1.6 2.0 v ref = 5v 1.9 2.5 power-down mode supply current i pd all dacs off, internal reference on 140 fa all dacs off, internal reference off, t a = -40nc to +85nc 0.7 2 all dacs off, internal reference off, t a = +125nc 2 4 digital supply current i ddio static logic inputs, all outputs unloaded 1 fa d igit a l in p ut ch ara cte r istics ( sclk , d in , csb , ldac, clr, m/z) input leakage current i in v in = 0v or v ddio , all inputs except m/z (note 11) q0.1 q1 fa v in = 0v or v dd , for m/z (note 11) ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 6 elect r ic a l ch ara cte r istics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) param ete r s ym bol con d itions m in t yp ma x units input high voltage v ih (all inputs except m/z) 2.2v < v ddio < 5.5v 0.7 x v ddio v 1.8v < v ddio < 2.2v 0.8 x v ddio v 2.7v < v dd < 5.5v (for m/z) 0.7 x v dd input low voltage v il (all inputs except m/z) 2.2v < v ddio < 5.5v 0.3 x v ddio v 1.8v < v ddio < 2.2v 0.2 x v ddio v 2.7v < v dd < 5.5v (for m/z) 0.3 x v dd input capacitance (note 10) c in 10 pf hysteresis voltage v h 0.15 v d igit a l out p ut ( irq) output low voltage v ol i sink = 3ma 0.2 v output inactive leakage i off q0.1 q1 fa output inactive capacitance (note 10) c off 10 pf d igit a l out p ut (d out ) output high voltage v oh v ddio > 2.5v, i source = 3ma v ddio - 0.2 v v ddio > 1.8v, i source = 2ma v ddio - 0.2 output low voltage v ol v ddio > 2.5v, i sink = 3ma 0.2 v v ddio > 1.8v, i sink = 2ma 0.2 output short-circuit current i oss i sink , i source 100 ma output three-state leakage i oz 0.1 1 a output three-state capacitance c oz 10 pf wa tch d og ti m e r ch ara cte r istics watchdog timer period t wdosc v dd = 3v, t a = +25c 0.95 1 1.05 ms watchdog timer period supply drift v dd = 2.7v to 5.5v, t a = +25c 0.6 %/v watchdog timer period temperature drift v dd = 3v 0.0375 %/c ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 7 elect r ic a l ch ara cte r istics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) param ete r s ym bol con d itions m in t yp ma x units spi timing characteristics sclk frequency f sclk 2.7v < v ddio < 5.5v write mode 0 50 mhz read mode, strobing on 1 sclk 0 25 read mode, strobing on ? sclk 0 12.5 1.8v < v ddio < 2.7v write mode 0 33 read mode, strobing on 1 sclk 0 20 read mode, strobing on ? sclk 0 10 sclk period t sclk 2.7v < v ddio < 5.5v, write mode 20 ns 1.8v < v ddio < 2.7v, write mode 30 sclk pulse width high t ch 8 ns sclk pulse width low t cl 8 ns csb fall to sclk fall setup time t css0 to first sclk falling edge 2 .7v < v ddio < 5.5v 8 ns 1.8v < v ddio < 2.7v 12 csb fall to sclk fall hold time t csh0 applies to inactive sclk falling edge preceding the first sclk falling edge 0 ns csb rise to sclk fall hold time t csh1 applies to the 24 th sclk falling edge 0 ns csb rise to sclk fall t csa applies to the 24 th sclk falling edge , aborted sequence 12 ns sclk fall to csb fall t csf a pplies to 24th sclk falling edge 100 ns csb pulse width high t cspw 20 ns din to sclk fall setup time t ds 5 ns din to sclk fall hold time t dh 4.5 ns clr pulse width low t clpw 20 ns clr rise to csb fall t csc required for command to be executed 20 ns ldac pulse width low t ldpw 20 ns ldac fall to sclk fall hold t ldh a pplies to 24th sclk falling edge 20 ns sclk fall to dout transition t dot dpha = 0, c load = 20pf 2 .7v < v ddio < 5.5v 35 ns 1.8v < v ddio < 2.7v 40 sclk rise to dout transition t dot dpha = 1, c load = 20pf 2 .7v < v ddio < 5.5v 35 ns 1.8v < v ddio < 2.7v 40 ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 8 n ote 3: limits are 100% production tested at t a = +25nc and/or t a = +125nc. limits over the operating temperature range and relevant supply voltage range are guaranteed by design and characterization. typical values are at t a = +25nc and are not guaranteed. n ote 4: dc performance is tested without load, v ref = v dd . n ote 5: linearity is tested with unloaded outputs to within 20mv of gnd and v dd . n ote 6: gain and offset calculated from measurements made with v ref = v dd at codes 30 and 4065 for max5725, codes 8 and 1016 for max5724, and codes 2 and 254 for MAX5723. n ote 7: subject to zero- and full-scale error limits and v ref settings. n ote 8: measured with all other dac outputs at midscale with one channel transitioning 0 to full scale. n ote 9: on power-up, the device initiates an internal 200s (typ) calibration sequence. all commands issued during this time will be ignored. n ote 10: guaranteed by design. n ote 11: all channels active at v fs , unloaded. static logic inputs with v il = v gnd and v ih = v ddio for all inputs. elect r ic a l ch ara cte r istics (continued) (v dd = 2.7v to 5.5v, v ddio = 1.8v to 5.5v, v gnd = 0v, c l = 200pf, r l = 2ki, t a = -40nc to +125nc, unless otherwise noted. typical values are at t a = +25nc.) (note 3) ?1. ? spi??? param ete r s ym bol con d itions m in t yp ma x units sclk fall to dout hold t doh dpha = 0, c load = 0pf 2 ns sclk rise to dout hold t doh dpha = 1, c load = 0pf 2 ns csb fall to dout fall t doe enable time, c load = 20pf 20 ns csb rise to dout hi-z t doz disable time 2 .7v < v ddio < 5.5v 20 ns 1.8v < v ddio < 2.7v 40 d in 23 12 din sclk csb dout (dpha = x) dout (dpha = x) t ds t dh t cl t csa t csh1 t doz t doh t csf z z t ch t csh0 z z t cspw t doe t clpw t csc t css0 t sclk 34 56 78 91 02 32 41 d in 22 d in 21 d in 20 d in 19 d in 18 d in 17 d in 16 d in 15 d in 14 d o 15 d o 1 d o 0 d in 1 d in 0 d in 23? d o 15 d o 14 d o 1 d o 0 t ldh t ldpw t dot t dot t doh clr ldac ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 9 ? (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) inl vs. code MAX5723 toc01 code (lsb) inl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 3v no load inl vs. code MAX5723 toc02 code (lsb) inl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 5v no load dnl vs. code MAX5723 toc03 code (lsb) dnl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 3v no load offset and zero-scale error vs. supply voltage MAX5723 toc07 supply voltage (v) error (mv) 5.1 4.7 3.9 4.3 3.5 3.1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 2.7 5.5 zero-scale error offset error v ref = 2.5v (external) no load dnl vs. code MAX5723 toc04 code (lsb) dnl (lsb) 3584 3072 2048 2560 1024 1536 512 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 4096 v dd = v ref = 5v no load inl and dnl vs. supply voltage MAX5723 toc05 supply voltage (v) error (lsb) 5.1 4.7 3.9 4.3 3.5 3.1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 max inl v dd = v ref 1.0 -1.0 2.7 5.5 max dnl min dnl min inl inl and dnl vs. temperature MAX5723 toc06 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 error (lsb) -0.8 -0.6 -0.4 -0.2 0.2 0 0.4 0.6 0.8 1.0 -1.0 max inl v dd = v ref = 3v max dnl min dnl min inl ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 10 ?( (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) full-scale error and gain error vs. temperature MAX5723 toc10 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 error (%fsr) -0.05 0 0.05 0.10 -0.10 v ref = 2.5v (external) no load gain error (v dd = 3v) gain error (v dd = 5v) full-scale error supply current vs. temperature MAX5723 toc11 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 supply current (ma) 1.2 1.4 1.6 2.0 1.8 1.0 v ref (external) = v dd = 5v v dd = v ddio v dac_ = full scale all dacs enabled no load v ref (internal) = 4.096v, v dd = 5v v ref (internal) = 2.5v, v dd = 5v v ref (internal) = 2.048v, v dd = 5v v ref (external) = v dd = 3v supply current vs. supply voltage MAX5723 toc12 supply voltage (v) supply current (ma) 5.1 4.7 3.9 4.3 3.5 3.1 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 2.7 5.5 v dd = v ddio v dac_ = full scale all dacs enabled no load v ref (internal) = 4.096v v ref (internal) = 2.5v v ref (internal) = 2.048v v ref = 2.5v (external) power-down mode supply current vs. supply voltage MAX5723 toc13 supply voltage (v) power-down supply current (a) 5.1 4.7 4.3 3.9 3.5 3.1 0.4 0.8 1.2 1.6 2.0 0 2.7 5.5 t a = -40c t a = +25c t a = +85c t a = +125c v dd = v ddio v ref = 2.5v (external) power-down mode with hi-z no load offset and zero-scale error vs. temperature MAX5723 toc08 temperature (c) 110 95 65 80 -10 5 20 35 50 -25 -40 125 error (mv) -0.8 -0.6 -0.4 -0.2 0.2 0 0.4 0.6 0.8 1.0 -1.0 v ref = 2.5v (external) no load offset error (v dd = 5v) offset error (v dd = 3v) zero-scale error full-scale error and gain error vs. supply voltage MAX5723 toc09 supply voltage (v) error (%fs) 5.1 4.7 3.9 4.3 3.5 3.1 -0.016 -0.012 -0.008 -0.004 0 0.004 0.008 0.012 0.016 v ref = 2.5v (external) no load 0.020 -0.020 2.7 5.5 full-scale error gain error ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 11 ?( (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) i vdd vs. code MAX5723 toc14 code (lsb) supply current (ma) 3584 3072 2560 2048 1536 1024 0.4 0.8 1.2 1.6 2.0 0 5120 4096 v dd = 5v, v ref = 4.096v v dd = v ref = 3v v dd = 5v, v ref = 2.048v v dd = 5v, v ref = 2.5v v dd = v ref = 5v no load i ref (external) vs. code MAX5723 toc15 code (lsb) reference current ( a) 3584 3072 2560 2048 1536 1024 10 20 30 40 50 60 0 5120 4096 v dd = v ref no load v ref = 5v v ref = 3v MAX5723 toc16 trigger pulse 5v/div v out 0.5v/div zoomed v out 1 lsb/div 4s/div settling to 1 lsb (v dd = v ref = 5v, r l = 2ki , c l = 200pf) 3.75s 1/4 scale to 3/4 scale MAX5723 toc17 trigger pulse 5v/div v out 0.5v/div zoomed v out 1 lsb/div 4s/div settling to 1 lsb (v dd = v ref = 5v, r l = 2ki , c l = 200pf) 3/4 scale to 1/4 scale 4.3s MAX5723 toc18 trigger pulse 5v/div 1 lsb change (midcode transition 0x800 to 0x7ff) glitch impulse = 2nv*s zoomed v out 1.25mv/div 2s/div major code transition glitch energy (v dd = v ref = 5v, r l = 2ki , c l = 200pf) major code transition glitch energy (v dd = v ref = 5v, r l = 2ki , c l = 200pf) MAX5723 toc19 2s/div trigger pulse 5v/div zoomed v out 1.25mv/div 1 lsb change (midcode transition 0x7ff to 0x800) glitch impulse = 2nv*s ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 12 ??8/10/12dac ??spi? MAX5723/max5724/max5725 ?( (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) v out vs. time transient exiting power-down MAX5723 toc20 dac output 500mv/div 10s /div v sclk 5v/div 0v 24th edge 0v v dd = 5v, v ref = 2.5v external power-on reset to 0v MAX5723 toc21 v out 2v/div 20s /div v dd 2v/div 0v 0v v dd = v ref = 5v 10ki load to v dd channel-to-channel feedthrough (v dd = v ref = 5v, t a = +25n c, r l = 2ki , c l = 200pf) MAX5723 toc24 4s /div v dac0 5v/div loaded v dac4 0.585 lsb/div no load transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 4.07nv*s MAX5723 toc25 v dac0 5v/div loaded v dac4 0.585 lsb/div no load 4s/div channel-to-channel feedthrough (v dd = 5v, v ref = 4.096v (internal), t a = +25n c, r l = 2ki , c l = 200pf) transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 3.3nv*s channel-to-channel feedthrough (v dd = v ref = 5v, t a = +25n c, no load) MAX5723 toc22 4s /div v dac0 5v/div no load v dac4 0.585 lsb/div no load transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 3.3nv*s channel-to-channel feedthrough (v dd = 5v, v ref = 4.096v, t a = +25n c, no load) MAX5723 toc23 4s /div v dac0 5v/div no load v dac4 0.585 lsb/div no load transitioning dac: 0 to full scale static dac: midscale analog crosstalk = 2.6nv*s
maxim integrated products 13 ??8/10/12dac ??spi? MAX5723/max5724/max5725 ?( (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) digital feedthrough (v dd = v ref = 5v, r l = 10ki) MAX5723 toc26 2.5mv/div 20ns/div v ref = 4.096v (internal) digital crosstalk = 0.2nv*s output load regulation MAX5723 toc27 i o ut (ma) d v out (mv) 50 40 20 30 -10 0 10 -20 -8 -6 -4 -2 0 2 4 6 8 10 -10 -30 60 v dd = v ref v dd = 5v v dd = 3v output current limiting MAX5723 toc28 i out (ma) d v out (mv) 60 50 30 40 -10 0 10 20 -20 -400 -300 -200 -100 0 100 200 300 400 500 -500 -30 70 v dd = v ref v dd = 5v v dd = 3v headroom at rails vs. output current MAX5723 toc29 i out (ma) v out (v) 9 8 6 7 2 3 4 5 1 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 0 01 0 v dd = 5v, sourcing v dd = 3v, sourcing v dd = 3v and 5v sinking v dd = v ref dac = full scale noise-voltage density vs. frequency (dac at midscale) MAX5723 toc30 frequency (hz) noise-voltage density (nv/ hz) 10k 1k 50 100 150 200 250 300 350 0 100 100k v dd = 5v, v ref = 2.5v internal v dd = 5v, v ref = 2.048v internal v dd = 5v, v ref = 3.5v (external) v dd = 5v, v ref = 4.096v internal
maxim integrated products 14 ?( (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) 0.1hz to 10hz output noise, external reference (v dd = 5v, v ref = 4.5v) MAX5723 toc31 2v/div midscale unloaded v p-p = 12v 4s/div 0.1hz to 10hz output noise, internal reference (v dd = 5v, v ref = 2.048v) MAX5723 toc32 2v/div midscale unloaded v p-p = 13v 4s/div 0.1hz to 10hz output noise, internal reference (v dd = 5v, v ref = 2.5v) MAX5723 toc33 2v/div midscale unloaded v p-p = 15v 4s/div 0.1hz to 10hz output noise, internal reference (v dd = 5v, v ref = 4.096v) MAX5723 toc34 2v/div midscale unloaded v p-p = 16v 4s/div ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 15 ??8/10/12dac ??spi? MAX5723/max5724/max5725 ?( (max5725, 12-bit performance, t a = +25c, unless otherwise noted.) watchdog timer period histogram MAX5723 toc38 frequency (hz) percent of population (%) 4 6 8 10 12 14 0 2 988 990 992 994 996 998 1000 1002 1004 1006 1008 1010 1012 1014 watchdog timer frequency vs. supply voltage MAX5723 toc39 supply voltage (v) watchdog timer frequency (hz) 5.1 4.7 4.3 3.9 3.5 3.1 980 985 990 995 1000 1005 975 2.7 5.5 watchdog timer frequency vs. temperature MAX5723 toc40 temperature (c) watchdog timer frequency (hz) 110 95 65 80 -10 5 20 35 50 -25 920 930 940 950 960 970 980 990 1000 1010 910 -40 125 v dd = 3v supply current vs. supply voltage MAX5723 toc37 input logic voltage (v) supply current (a) 4 3 2 1 500 1000 1500 2000 2500 3000 3500 0 05 sclk, csb, din, clr, and ldac swept from 0v to v ddio and v ddio to 0v v dd = 3v v ddio = 5v v ddio = 3v v ddio = 1.8v v ref drift vs. temperature MAX5723 toc35 temperature drift (ppm /c) percent of population (%) 5.0 4.54.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 5 10 15 20 25 30 0 0 v dd = 2.7v v ref = 2.5v (internal) box method reference load regulation MAX5723 toc36 reference output current (a) dv ref (mv) 450 400 350 300 250 200 150 100 50 -0.8 -0.6 -0.4 -0.2 0 -1.0 0 500 v ref = 2.048v, 2.5v, and 4.096v v dd = 5v internal reference
maxim integrated products 16 ? tsso p w l p 1 d3 ref ??/ 2 d2 dac0 dac?0? 3 d1 dac1 dac?1? 4 c1 dac2 dac?2? 5 c2 dac3 dac?3? 6 b2 dac4 dac?4? 7 b1 dac5 dac?5? 8 a1 dac6 dac?6? 9 a2 dac7 dac?7? 10 b3 v dd ??? 11 a3 v ddio ??? 12 a4 dout spi 13 a5 din spi? 14 b5 sclk spi?? 15 b4 csb spi??? 16 c5 irq ???irq?????? 17 c4 clr ???dac? 18 d5 ldac ???dac?? 19 d4 gnd ? 20 c3 m/z dac???m/zgnd???m/zv dd ?? ? 20 19 18 17 16 15 14 1 2 3 4 5 6 7 m/z gnd ldac clr dac2 dac1 dac0 ref top view MAX5723 max5724 max5725 irq csb sclk dac5 dac4 dac3 13 12 11 8 9 10 din dout v ddio v dd dac7 dac6 tssop + top view clr dac2 csb dac5 dout dac6 MAX5723/max5724/max5725 + 1 2 34 a dac3 m/z dac4 v dd dac7 v ddio b c wlp d irq sclk din 5 gnd dac1 dac0 ref ldac ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 17 ?? MAX5723/max5724/max5725?8???8/10/12 ? ?dac2.7v5.5v??? ????????? ??100k ???? ??????2.048v2.500v 4.096v??4spi/qspi/microwire/ dsp???????? y?????MAX5723/max5724/max5725 /??codedac?dac ??(m/ z?=?0)?(m/z ?=?1)?y (por)?? ? clr ??dac????? ??? ldac ????? ?dacMAX5723/max5724/max5725? ???????irq?? dac(out_) MAX5723/max5724/max5725dac? dac?? ?1v/ s?(?)2k ?()500pf?() ????(v dd )? ? gndv dd ??gnd ??2k ?gndv dd 200mv ??v dd ??2k ? gndv dd 200mv?? dac?? out ref n d vv 2 = ?d?=??dac???v ref ?=??? n?=??? ??? ??dac???? ?????? ?dac?? ?dac?code??dac? ( ??? )code??r dac??dac?code? codecode_load?? dac???dacdac?? ????code_loadload ldac???code???? ?????codedac?? dac????????? codeload??? ???return??dac?? ??return??codedac?? ???????default ? ? clrsw_clear??codedac? ???????sw_reset codedac??m/ z ???? ?sw_gate?dac? default?codedac???? ??????? ?? MAX5723/max5724/max5725????? ?2.048v2.500v4.096v??? ?ref????( ? ) 25k ?? ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 18 ?? ????100k ?? + 1.24v v dd ?refgnd????? ??MAX5723/max5724/max5725?? ????????? china.maxim-ic.com/products/references ? m/z MAX5723/max5724/max5725 ?dac ???m/ z ??y?codedac ???(m/ z ?=?gnd) (m/ z?= ? v dd )m/zv dd ?(v ddio )????? m/zm/z?v dd gnd ?dac (ldac) MAX5723/max5724/max5725 ? ldac ??dac???? ???? ldac v ddio ldac ??? ldac ????code ?dac ldac ????? dac???code?dac? dacconfig? dacldac (clr) MAX5723/max5724/max5725???clr? ??????dac?? default? ? clr ????code dac?????dac ??i 2 c?i 2 c? clr ? ??t csc ????config ?dac? ? MAX5723/max5724/max5725 ? ???i/o????? ????? ???????dac ??default??????? ?????? ???config? ??dac?????? ???wdog_config? ??????m?????? ?? irq MAX5723/max5724/max5725??? ????? ???(v ddio ) MAX5723/max5724/max5725??(1.8v 5.5v)??(v ddio )v ddio i/o? spi? MAX5723/max5724/max5725?4??microwire ? spiqspidsp????sclkcsb din??(csb??)? (din)????csb????? ???(sclk)??? ???24dac ?? 1 ??24sclk??24 ??????? ?spicsb????? ???????? csb?????sclk??? ??24sclk?spi? 24sclk??????3??? 24sclk?spispi ??????? spi_readdout??? ??i/o??sclk?dout? ???/???? MAX5723/max5724/max5725??? dout??????dout? spi????dpha?=?0 1. ?dac? par t b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 MAX5723 d7 d6 d5 d4 d3 d2 d1 d0 x x x x x x x x max5724 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x x x max5725 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 x x x x ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 19 MAX5723/max5724/max5725 ?sclk 8-23 ?dout?????? ( p)??sclk?9-24???? ?25mhz???5ns??? ?v ddio ? > ? 2.7v?t dot ?35ns ?dout???????? ? ? dpha?=?1MAX5723/ max5724/max5725?sclk9-24?dout ? ?????sclk?9-24?dout? ???12.5mhz???5ns ???t dot ?35ns?(sclk??? 50%) ????????spi_read_status ? ??????? ?(??dout???50mhz) ?spi_read_data? dout?????? ?1 ??4??????? ?MAX5723/max5724/max5725dac (1)??????2 spi?? MAX5723/max5724/max5725??? ?? ? 2????? ?2. ? spi?? MAX5723 max5724 max5725 csb sclk din dout csb sclk din dout csb csb3 csb2 sclk din csb1 r pu = 5ki +5v sclk mosi miso irq c irq irq ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 20 2. spi co mma n d b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 d esc r i p tion con f igu ra tion a n d so f t war e co mma n d s wdog 0 0 0 1 x x x x timeout selection[11:4] timeout selection[3:0] wd_mask safety level 00: low 01: med 10: high 11: max x updates watchdog settings and safety levels ref 0 0 1 0 0 ref power 0 = dac 1 = on ref mode 00 = ext 01 = 2.5v 10 = 2.0v 11 = 4.1v x x x x x x x x x x x x x x x x sets the reference operating mode. ref power (b18): 0 = internal reference is only powered if at least one dac is powered 1 = internal reference is always powered sw_gate_ clr 0 0 1 1 0 0 0 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 removes any existing gate condition sw_gate_ set 0 0 1 1 0 0 0 1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 initiates a gate condition wd_refresh 0 0 1 1 0 0 1 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 refreshes the watchdog timer wd_reset 0 0 1 1 0 0 1 1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 reset the watchdog time out alarm status and refreshes the watchdog timer sw_clear 0 0 1 1 0 1 0 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 executes a software clear (all code and dac registers cleared to their default values) sw_reset 0 0 1 1 0 1 0 1 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 0 executes a software reset (all code, dac, and control registers returned to their power-on reset values) config 0 1 0 1 0 0 0 0 dac7 dac6 dac5 dac4 dac3 dac2 dac1 dac0 wdog config. 00: dis 01: gate 10: clr 11: hold gate_enb ldac_enb clear_enb x x x configures selected dac watchdog, gate, load, and clear operations. dacs selected with a 1 in the corresponding dacn bit are updated, dacs with a 0 in the corresponding dacn bit are not impacted) ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 21 2. spi() co mma n d b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 d esc r i p tion power 0 1 0 0 0 0 0 0 dac7 dac6 dac5 dac4 dac3 dac2 dac1 dac0 power mode 00 = normal 01 = pd1ki 10 = pd 100ki 11 = pd hi-z x x x x x x sets the power mode of the selected dacs (dacs selected with a 1 in the corresponding dacn bit are updated, dacs with a 0 in the corresponding dacn bit are not impacted) default 0 1 1 0 0 0 0 0 dac7 dac6 dac5 dac4 dac3 dac2 dac1 dac0 default values: 000: mz 001: zero 010: mid 011: full 100: return 101+: no effect sets the default code settings for selected dacs. note, dacs in return mode programmable return codes. (dacs selected with a 1 in the corresponding dacn bit are updated, dacs with a 0 in the corresponding dacn bit are not impacted) da c co mma n d s returnn 0 1 1 1 dac selection return register data[11:4] return register data[3:0] x x x x writes data to the selected return register(s) coden 1 0 0 0 dac selection code register data[11:4] code register data[3:0] x x x x writes data to the selected code register(s) loadn 1 0 0 1 dac selection x x x x x x x x x x x x x x x x transfers data from the selected code registers to the selected dac register(s) coden_ load_all 1 0 1 0 dac selection code register data[11:4] code register data[3:0] x x x x simultaneously writes data to the selected code register(s) while updating all dac registers coden_ loadn 1 0 1 1 dac selection code register data[11:4] code register data[3:0] x x x x simultaneously writes data to the selected code register(s) while updating selected dac register(s) code_all 1 1 0 0 0 0 0 0 code register data[11:4] code register data[3:0] x x x x writes data to all code registers ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 22 2. spi() co mma n d b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 d esc r i p tion load_all 1 1 0 0 0 0 0 1 x x x x x x x x x x x x x x x x updates all dac latches with current code register data code_all load_all 1 1 0 0 0 0 1 0 code register data[11:4] code register data[3:0] x x x x simultaneously writes data to the all code registers while updating all dac registers return_all 1 1 0 0 0 0 1 1 return register data[11:4] return register data[3:0] x x x x writes data to all return registers spi_data_ request 1 1 0 1 dac selection inc data sel [1:0] 00 = dac 01 = code 10 = ret 11 = wdt x x x x x x x x x x x x setup data request for readback. inc indicates if the dac selection is incremented to the next dac after each spi_read _data operation data sel[1:0] indicates the data content to be read back spi_read status 1 1 1 0 0 0 x x x x x x x x x x x x x x x x x x dpha = 0 readback status 1 1 1 0 0 1 x x x x x x x x x x x x x x x x x x dpha = 1 readback status spi_read data 1 1 1 0 1 0 x x x x x x x x x x x x x x x x x x dpha = 0 readback requested data 1 1 1 0 1 1 x x x x x x x x x x x x x x x x x x dpha = 1 readback requested data no o p e ra tion co mma n d s no operation 1 1 0 0 0 1 x x x x x x x x x x x x x x x x x x these commands will have no effect on the device, but will refresh the watchdog timer if safety level is set to low. 1 1 0 0 1 0 x x x x x x x x x x x x x x x x x x 1 1 0 0 1 1 x x x x x x x x x x x x x x x x x x reserved c ommands: any commands not specifically listed above are reserved for maxim internal use only. ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 23 returnn return(b[23:20]?=?0111)???return? ? ??????? default?dacret??? ?dac_address??dac? return???return_all ? ????????? ??? coden coden(b[23:20]?=?1000)?daccode ??code???dac ldac ??????config ?dac????dac_ address??dac?code? ??code_all loadn loadn (b[23:20]?=?1001)? ?code ????dac??dac dac???load ldac code?????? ?dac_address??dac? dac???load_all coden_loadn coden_loadn(b[23:20]?=?1011)?daccode ? ????dacdac?? ?loadldac code??? ?????dac_address ??dac?code_all_load_all coden_load_all coden_load_all (b[23:20]?=?1010) ?dac code????dacdac?? ?load ldac code? ???????dac_ address??dac?daccode dac???code_all_load_all? ????code? ?dac_address??dacload load_all ? code_all code_all (b[23:16]?=?1100_0000) ? dac code?? load_all load_all(b[23:16]?=?1100_0001)?code? ???dac??dacdac ? ? code_all_load_all code_all_load_all(b[23:16]?=?1100_0010) ?daccode????dacdac? ? ? return_all return_all (b[23:16]?=?1100_0011) ? dac return?? ? ????(b[23:16]?=?1100_01xx 1100_1xxx)??????( )???? 3. dac? b 19 b 18 b 17 b 16 da c selecte d 0 0 0 0 dac0 0 0 0 1 dac1 0 0 1 0 dac2 0 0 1 1 dac3 0 1 0 0 dac4 0 1 0 1 dac5 0 1 1 0 dac6 0 1 1 1 dac7 1 x x x all dacs ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 24 wdog wdog (b[23:20]?=?0001) ? ???1ms??(?1ms 4095ms)wd_mask???? irq wd_mask?=?1?? irq ?spi??????(wd) wd_mask?????? ?(?wd_reset?)?? ?o????????^ ??(wl[1:0]) ?(00) ??????? ?????????? ?(9scl?)??? clr ldac ??????? ??????? ldacclr (01) ?wd_refresh??? ?? ldac clr ???? ???? ???ldacclr ?(10) ?wd_refresh??? ?? ldac clr ???? ????powerref configdefaultreturn?? ldacclr ???(11) ?wd_refresh? ??? ldac clr ?? ??????power refconfigdefaultreturn? ??ldacclr?? 5. ??? * config???holdclr????config?^ 4. wdog? wa tch d og saf et y l evel an y c o mma n d re fr eshes wd t clr/ ldac re fr eshes wd t s w r eset p lus wd rfr s re fr eshes wd t all registe r s accessible af te r wd t t i m eout* clr /ldac a ff ect da c registe r s a f te r wd t t i m eout* 00 (low) x x x x x 01 (med) x x x 10 (high) x x 11 (max) x b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 0 0 1 x x x x c 11 c 10 c 9 c 8 c 7 c 6 c 5 c 4 c 3 c 2 c 1 c 0 wdm w l 1 w l 0 x wdog command dont care timeout selection timeout selection wd_mask wdog safety level: 00: low 01: med 10: high 11: max dont care default value 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 x command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 25 6. ref? ref ref(b[23:20]?=?0010)?dac?? ??????? ? rf2?(b18) ???r f2?(??)?dac? ?????(standby??) rf2?1??dac????? ?(?????? ?)??????? ????? sw_gate_clr sw_gate_clr(b[23:0]?=?0011_0000_1001_0110_ ? 0011_0000)???sw_gate_set?gate ? sw_gate_set sw_gate_set(b[23:0]?=?0011_0001_1001_0110_ ? 0011_0000) gate ?gtb?=?0 dac?( config )?? default??sw_gate_clrgate ????codedac? (???) wd_refresh wd_refresh(b[23:0]?=?0011_0010_1001_0110_ ? 0011_0000)????? ???????? ????? wd_reset wd_reset(b[23:0]?=?0011_0011_1001_0110_ ? 0011_0000)?(?)????? ?????? irq ? ???dac? sw_clear (b[23:0]?=?0011_0100_001_0110_0011_ ? 0000) ?clb?=?0?(config ) ? ? codedac??default??? sw_reset (b[23:0]?=?0011_0101_1001_0110_0011_? 0000)?codedac???? (powerdefaultconfigwdogref? ??y b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 0 1 0 0 rf2 rf1 rf0 x x x x x x x x x x x x x x x x ref command reserved 0 = dac controlled 1 = always on ref mode: 00: ext 01: 2.5v 10: 2.0v 11: 4.0v dont care dont care default value 0 0 0 x x x x x x x x x x x x x x x x command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 26 power power(b[23:20]?=?0100)?dac???? ???dac? ?pd[1:0]?(b[7:6])b[15:8]?? dac?dac??rf2?? standby??(??)?? ????????? ? ?????(pd[1:0]) (00)dac?(?). pd ? 1k ? ? (01)??1k ?gnd pd ? 100k ? ? (10)??100k ??gnd pd ? hi-z ? (11)?? config config (b[23:16]?=?0101) ?dac ??????dac ??b[7:3]b[15:8]?? dac??????? ???? ?? wdog?wc[1:0] ? (b[7:6])?d isable ? (w c ? = ? 00)????dac? ga te?(wc?=?01)????dac?? default???????code dac? ldac clr ?? ??????dac? clr ?(wc?=?10)????codedac ???default??codedac? ? ldac clr ????? ????????? hold?(wc?=?11)????dac? ????daccode?? ldac clr ???????? ?????? ? ???????? ?wdog 7. power? b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 1 0 0 0 0 0 0 7 6 5 4 3 2 1 0 pd1 pd0 x x x x x x power command reserved multiple dac selection power mode: 00 = normal 01 = 1kw 10 = 100k w 11 = hi-z dont care default value 1 1 1 1 1 1 1 1 0 0 x x x x x x command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 27 8. config? ??? dac ? gategtb ? (b5)?gate gt b?=?0???(?)??gate ? ?(sw_gate_set ? sw_gate_clr ) dac??default gtb?=?1???dacgate??? ? ?? ldac_enbldb ? (b4)?ldac_enb ldb ? = ? 0dac?ldac load(?) ldb?=?1dac?code??? dac ? clear_enbclb ? (b3)?cl ear_enb clb ? = ? 0??dac ? (?)code dac???default? clb ? = ? 1???dac b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 1 0 1 0 0 0 0 7 6 5 4 3 2 1 0 w c 1 w c 0 gtb l d b clb x x x config command reserved multiple dac selection wdog config: 00: disable 01: gate 10: clr 11: hold gate_enb ldac_enb clear_enb dont care default value 1 1 1 1 1 1 1 1 0 0 0 0 0 x x x command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 28 default default(b[23:20]?=?0110)??dac?? ???dac?? ????????? df[2:0] ? (b[7:5])b[15:8]??dac ??????? ????????? sw_reset?/? ?dac??m/ z ??? m/z?? ???(df[2:0]) m/z ? (000)dac???m/z??(?) zero ? (001)dac????? mid ? (010)dac????? full ? (011)dac????? retu rn ? (10 0)dac???return?? no ? effect ? (101, ? 110, ? 111)dac???? 9. default? b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 1 1 0 0 0 0 0 7 6 5 4 3 2 1 0 df2 df1 df0 x x x x x default command reserved multiple dac selection default values: 000: m/z 001: zero 010: mid 011: full 100: return 101+: no effect dont care default value 1 1 1 1 1 1 1 1 0 0 0 x x x x x command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 29 spi_data_request spi_data_request(b[23:20] ? = ? 1101)?spi_ read_data spi_read_data ????codedacreturn?? ???(wdog)??dac ??spi_read_data??? ( 3 )?dac?dacs? ?0? inc??dac??? 0 ? =????(??????) 1 ?=???(????? ?)sel[1:0]? dac ? (00)dac?(?dac??? ?????) code ? (01)code?? ret ? (10)return?? wdt ? (11)wdog?(dac??) 10. spi_data_request? 11. spi_read_status? spi_read_status spi_read_status (dpha?=?0?b[23:18]?= ? 111000dpha ? = ? 1?b[23:18] ? = ? 111001)?dout ???clr ??(? ?) din[18]???dout?(dpha)?(?? ?1? spi?) wd_stat?????0 ???1wd_statwdog_configwd_ mask? clr_statclr ???0? clr ?? spi????(?)1? clr ??? ??(v ddio ?) b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 1 1 0 1 dac selection inc sel[1:0] x x x x x x x x x x x x x spi_data_request dac selection increment data selection 00: dac 01: code 10: ret 11: wdt dont care dont care default value 0 0 0 0 1 0 0 x x x x x x x x x x x x x command byte data high byte data low byte b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 1 1 1 0 0 0 x x x x x x x x x x x x x x x x x x spi_read_status (dpha = 0) dout = wd_stat (repeated) dout = clr_stat (repeated) 1 1 1 0 0 1 x x x x x x x x x x x x x x x x x x spi_read_status (dpha = 1) dout = wd_stat (repeated) dout = clr_stat (repeated) command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 30 12. spi_read_data? spi_read_data spi_read_data(dpha ? = ? 0?b[23:18] ? = ? 111010 dp ha?=?1?b[23:18]?=?111011)?dout? spi_data_request? din[18]???dout(dpha)?(?? ?1 ? ??dpha??? electrical? characteristics spi ? timing ? characteristics) spi_read_d ataspi_data_requestsel ? ??????spi_data_ request ? inc?spi_read_data?? ?????????? b 23 b 22 b 21 b 20 b 19 b 18 b 17 b 16 b 15 b 14 b 13 b 12 b 11 b 10 b 9 b 8 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 1 1 1 0 1 0 x x x x x x x x x x x x x x x x x x spi_read_data (dpha = 0, sel = 00) dout = dac[11:4] dout = dac[3:0] address[3:0] spi_read_data (dpha = 0, sel = 01) dout = code[11:4] dout = code[3:0] address[3:0] spi_read_data (dpha = 0, sel = 10) dout = return[11:4] dout = ret[3:0] address[3:0] spi_read_data (dpha = 0, sel = 11) dout = wdog[15:8] dout = wdog[7:1] 0 1 1 1 0 1 1 x x x x x x x x x x x x x x x x x x spi_read_data (dpha = 1, sel = 00) dout = dac[11:4] dout = dac[3:0] address[3:0] spi_read_data (dpha = 1, sel = 01) dout = code[11:4] dout = code[3:0] address[3:0] spi_read_data (dpha = 1, sel = 10) dout = return[11:4] dout = ret[3:0] address[3:0] spi_read_data (dpha = 1, sel = 11) dout = wdog[15:8] dout = wdog[7:1] 0 command byte data high byte data low byte ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 31 ?? ?y(por) ?v dd v ddio ?dac??? dac???????? (200 s?) ? ????v dd v ddio ? ?????gnd ?? ? gnd???????gnd ?dac?????dac?? ???????? ???? ???MAX5723/max5724/max5725 gnd??????? ????? ???????? ????MAX5723/max5724/max5725 ??? ?(inl) inl???? ??? ??(dnl) dnl???1?lsb??dnl? ?1?lsbdac????dnl? ?1 ? lsbdac?? ? ????????? ???????? ??? ???? ?????? ??????? ?dac?0??? ??? ?dac?????? ??? ? ?????dac?(? ?)??? ? ??dac??dac? /?? ?????msb????? ???????msb ??????????? ???/?? ^???????? /??????????? ??^ ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 32 ??? out0 out1 buffer 0 channel 0 dac control logic dac channel 0 dac channel 1 power-down 1ki 100ki code load clear / reset gate/ clear / reset code register 0 dac latch 0 8- /1 0- /1 2- bit dac0 din sclk csb v ddio dout clr ldac spi serial interface control logic ref r in 100ki internal/external reference (user option) MAX5723 max5724 max5725 v dd gnd irq out7 buffer 7 channel 7 dac control logic dac channel 7 power-down 1ki 100ki code load clear / reset gate/ clear / reset code register 7 dac latch 7 8- /1 0- /1 2- bit dac7 out2 dac channel 2 out3 dac channel 3 out4 dac channel 4 out5 dac channel 5 out6 dac channel 6 watchdog timer m/z por ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 33 ? c csb sclk din clr irq m/z dout note: unipolar operating circuit, one channel shown dac out gnd ldac v ddio v dd ref 100nf 100nf 4.7f r pu = 5ki MAX5723 max5724 max5725 dac c csb sclk din clr irq m/z dout out gnd ldac v ddio v dd ref 100nf 100nf 4.7f r pu = 5ki r1 r2 r1 = r2 MAX5723 max5724 max5725 note: bipolar operating circuit, one channel shown ??8/10/12dac ??spi? MAX5723/max5724/max5725
maxim integrated products 34 ? ??-40c+125c??? + ??(pb)/rohs??? * ??? t ? =?? ?? process: bicmos ?? ?????(?)? china. maxim-ic.com/packages ????+# -?rohs???????? ?????rohs???? ?? -? ?() ma x 5723 aup+* -40c to +125c 20 tssop 8 ma x 5724 aup+* -40c to +125c 20 tssop 10 ma x 5725 aaup+ -40c to +125c 20 tssop 12 max5725awp+t* -40c to +125c 20 wlp 12 max5725baup+* -40c to +125c 20 tssop 12 ? ? ?? 20 tssop u20+1 21-0066 90-0116 20 wlp w202c2+1 21-0059 ???1891 ??8/10/12dac ??spi? MAX5723/max5724/max5725
?? maximmaxim????????maxim??????????? ???(??)?????? maxim integrated 160 rio robles, san jose, ca 95134 usa 1-408-601-10 00 35 ? 2012 maxim integrated maxim?maxim ? integratedmaxim ? inte ? grated ? products, ? inc.?? maxim 8328 100083 ?800 810 0310 010-6211 5199 010-6211 5299 ? ? ? ?? 0 3/12 ??8/10/12dac ??spi? MAX5723/max5724/max5725

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